Fujitsu FR81 Computer Hardware User Manual


 
FR81 Family
470 FUJITSU MICROELECTRONICS LIMITED CM71-00105-1E
DMOVH (Move Halfword Data from Direct Address
to Post Increment Register Indirect Address)
..........................................................207
DMOVH (Move Halfword Data from Post Increment
Register Indirect Address to Direct Address)
..........................................................209
Prior Preparation
Types of EIT Processing and Prior Preparation
............................................................43
Priority Levels
Multiple EIT processing and Priority Levels
............................................................60
Priority Levels of EIT Requests ...........................61
Processing
Multiple EIT Processing......................................60
processing
Multiple EIT processing and Priority Levels
............................................................60
Program Access
Program Access..................................................14
Program Counter
Program Counter (PC).........................................20
Program Status
LD (Load Word Data in Memory to Program Status
Register) .............................................294
MOV (Move Word Data in Program Status Register to
Destination Register)............................338
Program Status (PS)............................................20
Program Status Register
ST (Store Word Data in Program Status Register to
Memory).............................................392
PS
Program Status (PS)............................................20
R
R15
Interlocking produced by reference to R15 and
General-purpose Registers after Changing
the Stack flag (S flag).............................75
Read-Modify-Write
Read-Modify-Write type Instructions ...................96
Recovery
Recovery from EIT Processing.............................45
Register
Timing of Reflection of Interrupt Level Mask Register
(ILM) ...................................................64
Register Bypassing
Register Bypassing .............................................74
Register Configuration
FR80 Family CPU Register Configuration ............16
Register designated Field
Register designated Field.....................................91
Register hazard
Occurrence of register hazard ..............................74
Register hazards.................................................74
Register Settings
Timing When Register Settings Are Reflected
............................................................63
Remain
DIV2 (Correction When Remain is 0) ................177
DIV3 (Correction When Remain is 0) ................179
Reset
Reset.................................................................42
RET
RET (Return from Subroutine) ..........................366
RET:D
RET:D (Return from Subroutine).......................368
RETI
RETI (Return from Interrupt) ............................370
Return
RET (Return from Subroutine)
..........................366
RET:D (Return from Subrout
ine).......................368
RETI (Return from Interrupt) ............................370
Return Pointer
Return Pointer (RP)............................................26
RP
Return Pointer (RP)............................................26
S
S flag
Interlocking produced by reference to R15 and
General-purpose Registers after Changing
the Stack flag (S flag) ............................75
SCR
System Condition Code Register (SCR) ...............25
Search
SRCH0 (Search First Zero bit position distance From
MSB).................................................373
SRCH1 (Search First One bit position distance From
MSB).................................................375
SRCHC (Search First bit value change position
distance From MSB)............................377
Sign Extend
EXTSB (Sign Extend from Byte Data to Word Data)
..........................................................221
EXTSH (Sign Extend from Byte Data to Word Data)
..........................................................223
Signed Division
DIV0S (Initial Setting Up for Signed Division)
..........................................................171
DIV4S (Correction Answer for Signed Division)
..........................................................181
Signed Division................................................100