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CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 161
FR81 Family
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.29
7.29 CALL:D (Call Subroutine)
This is a branching instruction with a delay slot. After saving the address of the next
instruction after the delay slot to the return pointer (RP), branch to the address
indicated by label12 relative to the value of the program counter (PC). When calculating
the address, double the value of rel11 as a signed extension.
● Assembler Format
CALL:D label12
● Operation
PC + 4 → RP
PC + 2 + exts(rel11 × 2) → PC
● Flag Change
N, Z, V, C: Unchanged.
● Classification
Delayed branching instruction
● Execution Cycles
1 cycle
● Instruction Format
NZVC
----
MSB LSB
11011 rel11