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CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 85
FR81 Family
CHAPTER 6 INSTRUCTION OVERVIEW
6.2
6.2 Instructions Formats
This part describes about Instruction Formats of FR81 Family CPU.
6.2.1 Instructions Notation Formats
● Integer type instruction
The integer type instruction is 2 operand format. There are 3 types of Instruction notation formats
depending on the number of operands. Instruction notation formats are as follows.
<Mnemonic> <Operand 1> <Operand 2>
Mnemonic calculations are carried out between operand 2 and operand 1 and the results are stored at
operand 2.
Ex: ADD R1,R2 ; R2 + R1 -> R2
<Mnemonic> <Operand 1>
Operations are designated by a mnemonic and use operand 1.
Ex: JMP @R1 ; R1 -> PC
<Mnemonic>
Operations are designated by a mnemonic.
Ex: NOP ; No Operation
Operands have general-purpose register, dedicated register, immediate data and combinations of part of
general-purpose register and immediate data. Operand format varies depending on Instruction.
● Floating point type instruction
Floating point type instruction is 3 operand format. The following description formats are added.
<Mnemonic> <Operand 1> <Operand 2> <Operand 3>
Mnemonic calculations are executed between operand 1 and operand 2 and the results are stored in
operand 3. For some of the instructions, calculations are executed between operand 3 and the
calculation result of operand 1 and operand 2, and then the results are stored in operand 3.
Ex: FADDs FR1, FR2, FR3 ; FR1 + FR2 -> FR3