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CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 295
FR81 Family
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.105
● Instruction Format
● EIT Occurrence and Detection
A data access protection violation exception, an invalid instruction exception (data access error), or an
interrupt is detected. If the interrupt level mask register (ILM) or interrupt enable flag (I) is changed, an
interrupt is detected using the changed values.
● Execution Example
LD @R15+, PS ; Bit pattern of the instruction: 0000 0111 1001 0000
MSB LSB
0000011110010000
12345670
12345674
123 4 5674
FFFF F8 D5
PS
R15
FFF8 F 8 C0
12345670
12345674
FFF8 F 8 C0
PS
123 4 5678
FFF8 F 8 C0
R15
Memory Memory
Before execution After execution