CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 107
FR81 Family
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.2
7.2 ADD (Add Word Data of Source Register to Destination
Register)
Adds word data of Rj to Ri, stores result to Ri.
● Assembler Format
ADD Rj, Ri
● Operation
Ri + Rj → Ri
● Flag Change
N: Set when the MSB of the operation result is "1", cleared when the MSB is "0".
Z: Set when the operation result is zero, cleared otherwise.
V: Set when an overflow has occurred as a result of the operation, cleared otherwise.
C: Set when a carry has occurred as a result of the operation, cleared otherwise.
● Classification
Add/Subtract Instruction, Instruction with delay slot
● Execution Cycles
1 cycle
● Instruction Format
NZVC
CCCC
MSB LSB
10100110 Rj Ri