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412 FUJITSU MICROELECTRONICS LIMITED CM71-00105-1E
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.167
7.167 STM1 (Store Multiple Registers)
The STM1 instruction stores the word data from multiple registers specified in reglist
(from R8 to R15) and repeats the operation of storing the result in address R15 after
subtracting the value of 4 from R15. Registers are processed in ascending order. If R15
is specified in the parameter reglist, the contents of R15 retained before the instruction
is executed will be written to memory.
● Assembler Format
STM1 (reglist)
Registers from R0 to R7 are separated by "," , arranged and specified.in reglist.
● Operation
The following operations are repeated according to the number of registers in reglist.
R15-4 → R15
Ri → (R15)
The bit values and register numbers for reglist (STM1) are shown in Table 7.167-1.
Table 7.167-1 Bit values and register numbers for reglist (STM1)
● Flag Change
N, Z, V, C: Unchanged.
Bit Register
7R8
6R9
5R10
4R11
3R12
2R13
1R14
0R15
NZVC
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