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5700A/5720A Series II Calibrator
Service Manual
2-98
2-157. 1100V DC Range
Refer to Figure 2-26 for the following discussion. The High Voltage assembly (A15)
amplifies the output of the DAC assembly (A11), set to the 11V range, by a gain of -100
to generate the 1100V dc range.
For operation in the 1100V dc range, DAC OUT HI and DAC SENSE HI from the DAC
assembly, set to the 11V range, are tied together and connected to the input of the dc HV
amplifier circuit by relay K1. The dc HV amplifier circuit, the HV dc output series pass
and current limit circuit, and the HV dc power supply circuit on the High Voltage
Control assembly (A14) constitute an overall amplifier with an inverting gain of 100.
This gain is determined by the 70 kΩ input and 7 MΩ feedback resistors on the HR7
assembly.
High voltage dc output, generated on the High Voltage Control assembly (A14), is
obtained by filtering an approximate trapezoidal wave. The overall loop gain of this
amplifier divides this ripple so the high voltage dc output is clean and stable.
Signal routing to the front panel binding posts is done in the same manner as the ac
1100V range.
2-158. HVDC Power Supply Filter Circuit
The high voltage dc power supplies are generated by the High Voltage Control assembly
(A14) in conjunction with the Power Amplifier assembly (A16). The High Voltage
Control assembly generates an amplitude-controlled square wave, HVCL, from the
magnitude control circuitry. The magnitude control circuit contains all the circuitry on
sheet 2 of the High Voltage Control assembly schematic.
Signal HVCL is amplified by the Power Amplifier assembly with its output, PA OUT
DC, connected to one side of the primary winding of transformer T1 by relay K1. The
other side of the primary is connected to PA COM by R67. The secondary windings of
T1 are connected to bridge rectifier CR1-CR4 by relays K9 and K6. The dc voltage from
this rectifier is called +HVDC and -HVDC. Resistors R3-R5 form a 600 kΩ bleeder
resistor for C1. Line HVDC is selected between +HVDC and -HVDC by relays K4 and
K11. Line HVDC is connected to HV OUT by relays K5, K12 and K3.
During operation with a negative DAC voltage and a positive output from the High
Voltage/High Current assembly, +HVDC is connected to HV OUT by relays K4, K11,
K5, K12 and K3. +SP C is created from -HVDC by relays K4 and K8. During operation
with a positive DAC voltage and a negative output from the High Voltage/High Current
assembly, -HVDC is connected to HV OUT by relays K4, K11, K5, K12 and K3. -SP C
is created from +HVDC by relays K4 and K8. Zener diodes VR4 and VR5 keep -SP C
and +SP C, respectively, from exceeding 16V. The dc voltage level of +SP C and -SP C
is controlled by the HV dc output series pass and current limit circuit on the High
Voltage/High Current assembly. This in turn controls the magnitude of HVCL which
sets the level of HVDC.
2-159. HV DC Output Series Pass and Current Limit Circuit
The HV dc output series pass circuit controls the level of +SP C when the high voltage
output is positive, and -SP C when the high voltage output is negative. Typically +SP C
and -SP C are approximately ±6.8V dc with ripple equal and opposite polarity from the
HVDC ripple.