CACHE SUBSYSTEMS
Each direct mapped
Cilche
address has
two
parts. The first part, called the cache index
field, contains enough bits to specify a block location within the cache. The second part,
called the tag field, contains enough bits to distinguish a block from other blocks that
. may be stored at a particular cache location.
For example, consider a 64-kilobyte direcf mapped cache that contains
16K
32-bit loca-
tions and caches
16
megabytes
of
main memory. The cache index field must include
14
bits to select one of the 16K blocks in the cache, plus 2 bits (or 4 byte Enables) to
select a byte from the 4-byte block. The tag field must be 8 bits wide to identify
One
of
the
256
blocks that can occupy the seleCted cache location. The remaining 8 bits
of
the
32-bit Intel386 DX microprocessor address are decoded to select the cache subsystem
from among other memories in the memory space. The direct-mapped cache organiza-
tion
is
shown in Figure
7-3.
32.BIT
131
24123 . 16
15
o
PROCESSOR
I CACHE/DRAM I
ADDRESS
SE~ECT
TAG
INDEX
j.-64K
CACHE = 16
BITS--+!
1+--16
MEGABYTE
DRAM
=
24
BITS----+!
INDEX
TAG
FFFC
01
FFF8 FF
0010
OOOC
0008
00
0004
01
0000
00
(14 BITS)
j.8
BIT~
64KSRAM
DATA
12345678
f...J
11223344
87654321
P
11235813
13579246
I-
j+32BITS~
CACHE
DATA
INDEX
FFFC
11223344
FFF8
0010
0000
0008
0004
0000
-
-
-
'---
12345678
FFFC
FFF8
0010
OOOC
0008
-
11235813
0004
0000
FFFC
FFF8
.0010
OOOC
87654321
0008
0004
13579246
0000
j+32BITS.j
16
MEGABYTE
DRAM
Figure 7-3. Direct Mapped Cache Organization
7-5
TAG
I
FF
I
01
I
~
231732;7ยท3
