A SERVICE OF

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85C220
CLOCK.
RESET
GENERATOR
CLK
RESET
CLK2
I
J.
T
RESET
ClK2
U
A05#
INTR
f--
-
-
NA#
M/IO#
W/R#
D/C
,...---
(Xl
.!.J
.-
-
READY#
Pf1RDY
-
i386'~
OX
CPU
READY
AS
7a
A3
,74F138
A12-A20
ADDRESS
BUS
BEO#
BE1#
8516#
Ii
00-015
DATA
BUS
~
- -
10RDY
=:J
IOPLD1
IOPLD2
~
CLK2
CLK2
CLK
f-
CLK
WICNTO
~
NA TRIOEN
-
ADS
WTeNT1
-
MilO
-
READY
WTCNT2
-
WIR
INTA
INTA
-
P20R8
D/C
EPRD
EPRDY
-
A31
IOWA
IOWR
PIRECYC
-
TIMEDLY
lORD
lORD
BUSCYC
-
BUSCVC
RECV
RECV
ALEJO
-
-
CS1WS
TIMEDLY -
~
-
CS3WS
CSSWS -
~
ALE#
ADDRESS
BUS
r
74F373
LATCHES
A1-A15
.--.
.2
..........
DT/R#
OEN#
..
74F245
TRANSCEIVER TO DATA BUS
V
.2
Figure 8-4. I/O
Controller
Schematic
INT
IPOo7
lA-
#.
AO
8259A
CS#
~
i
~
1'1
TTT
UI
::>
<II
~
Q
0
t-
I
UI
OE
::>
<II
..
27256A
;!
EPROM
«
Q
V
.2
0
t-
11
TO
INTERRUPT
-
-
INT'
-"IOWR
-
----.-IORO
_10
----..
CHIP
----..
SELECT
j
TO
DATA
BUS
Y
231732i6-4
l
.::::::
o
Z
-I
m
:0
)l!
Q
z
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~