Intel 386 Computer Hardware User Manual


 
CACHE SUBSYSTEMS
7.7.2.2 Intel387
OX
MATH COPROCESSOR INTERFACE
Coprocessor cycles are indicated when the Intel386
DX
microprocessor generates I/O
cycles to addresses 800000F8H and 800000FCH. The
82385
monitors the Intel386
DX
microprocessor
M/IO#
and
A31
signals to determine when the coprocessor
is
being
accessed.
When
a coprocessor access
is
encountered by the 82385, the cycle
is
effectively
ignored (the 82385 remains idle) during the cycle.
Care must be taken in designs which allow the Intel387
DX
math coprocessor to
be
an
option. Any time that the 82385 recognizes a coprocessor access
by
the Inte1386
DX
microprocessor,
it
will remain idle until the cycle
is
terminated. Therefore, if the
Intel386
DX
microprocessor executes a coprocessor cycle without the Iritel387
DX
math
coprocessor being present, the
82385
must see a
READYI#
to indicate the completion
of the cycle. Therefore, these cycles must be locally terminated.
7.7.2.3 82385 SYSTEM CONFIGURATION INPUTS
The
82385
offers three inputs which are used to allow various system configurations.
The
inputs allow for Inte1386
DX
microprocessor local bus accesses (LBA#), for non-
cache able memory accesses (NCA#), and
%-bit accesses (X16#). These
82385
inputs
are required to be activated in the first state where addresses are valid
(Tl
or first T2P)
and must remain valid until addresses change from the Inte1386
DX
microprocessor
(after the last T2 or
TIP).
Non-Cacheable
Accesses-NCA#.
NCA#
allows areas of memory to be mapped as non-
cacheable. Memory mapped
I/O and dual-ported memory are typical examples
of
areas
which are generally non-cacheable.
16-Bit
Transfers-X16#.
16-bit transfers can be managed by the Inte1386
DX
micropro-
cessor
by
using its BS16# input. The
82385
can accommodate these transfers by the use
of its
X16#
input.
If
X16#
is
activated, the access
is
treated as non-cacheable. The
Intel386
DX
microprocessor byte enables '(BEO#-BE3#) are monitored
by
the 82385 to
determine if it must lock two halves of a 16-bit transfer.
Intel386
DX
Microprocessor Local Bus
Cycles-LBA#.
The 82385
LBA#
input allows
devices to reside on the Intel386
DX
microprocessor local bus. Certain I/O ports
or
some memory space might be desired to be locally specific to the Inte1386
DX
micropro-
cessor. The Intel387
DX
math coprocessor resides on the Inte1386
DX
microprocessor
local bus, but the
82385
internally recognizes coprocessor accesses
(M/IO#
low
and A31
high). The Intel387
DX
math coprocessor does not need to be externally decoded as a
local bus device.
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