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I/O INTERFACING
,..---
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- -
--
- -
-----,
I I
I I
I I
I I
I
HOST
CPU
CHANNEL
ATIENTION
INTERRUPT
82586
LAN
COPROCESSOR
SERIAL
INTERFACE
82501
ETHERNET
SERIAL
INTERFACE
TRANSCEIVER
CABLE
IEEE 802.3 COMPATIBLE
WORKSTATION
82C502
ETHERNET
TRANSCEIVER
CHIP
L
______
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IEEE 802.3/ETHERNET
LINK
Figure 8-14.
LAN
Station
• Direct memory access (DMA)
• Buffer chaining
• High-level (user) command interpretation
231732i8-14
The 82586 has two interfaces: a bus interface to the Intel386
DX
microprocessor local
bus
and
a network interface to the Serial Interface Unit. The bus interface
is
described
here. For detailed information on using the 82586, refer to the
Local Area Networking
(LAN) Component
User's
Manual.
The 82586, which
is
a master on the Inte1386
DX
microprocessor local bus, communi-
cates directly with the Inte1386
DX
microprocessor through the Channel Attention (CA)
and interrupt (INT) signals. There are several
ways
to design an interface between the
8-23