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CHAPTER 1
SYSTEM OVERVIEW
The Intel386
DX
microprocessor
is
a 32-bit microprocessor that forms the basis for a
high-performance 32-bit system. The
Inte1386
DX
microprocessor incorporates multi-
tasking support, memory management, pipelined architecture, address translation
caches, and a high-speed bus interface
all
on one chip. The integration of these features
speeds the execution of instructions and reduces overall chip count for a system.
Paging
and dynamic data bus sizing can each be invoked selectively, making the Intel386
DX
microprocessor suitable for a wide variety of system designs and user ,applications.
While the Intel386 DX microprocessor represents a significant improvement over previ-
ous generations of microprocessors, substantial ties to the earlier processors are pre-
served. Software compatibility at the object-code level
is
provided, so that an existing
investment in
8086
and
80286
software can be maintained. New software can be built
upon existing routines, reducing the
time to market for new products. Hardware com-
patibility
is
preserved through the dynamic bus-sizing feature.
The Intel386 DX microprocessor
is
fully supported
by
a family of peripheral and perfor-
mance enhancement components. The major components of an Intel386 DX micropro-
cessor system and their functions are shown in Figure
1-1
and Figure
1-2.
Table
1-1
describes these components.
1.1
MICROPROCESSOR
The 33-MHz Intel386
DX
microprocessor has a peak execution rate of over
16
million
native instructions per second.
It
sustains rates
of
eight million equivalent VAX instruc-
tions per second, a speed comparable to that of most super minicomputers. This achieve-
ment
is
made possible through a state-of-the-art design that includes a pipelined internal
architecture, address translation caches, and a high-performance bus.
The Intel386
DX
microprocessor features 32-bit wide internal and external data paths
and eight general-purpose 32-bit registers. The instruction set offers
8-,
16-,
and 32-bit
data types, and the processor outputs 32-bit physical addresses directly, for a physical
memory capacity of four gigabytes.
The
Inte1386
DX
microprocessor has separate 32-bit data and address paths. A 32-bit
memory access can be completed in only. two clock cycles, enabling the bus to sustain
a
throughput of
40
megabytes per second (at
20
MHz).
By
making prompt transfers
between the microprocessor, memory, and peripherals, the high-speed bus design
ensures that the entire system benefits from the processor's increased performance.
Pipelined architecture enables the Inte1386
DX
microprocessor to perform instruction
fetching, decoding, execution, and memory management functions
in parallel. The
six
independent units that make-up the Intel386 DX microprocessor pipeline are described
1-1