Intel 386 Computer Hardware User Manual


 
SO#
Sl#
M/IO#
READY#
MBEN
LOCK#
1
~
I/O
INTERFACING
82289
SO#
LLOCK#
r---
Sl#
CBRO#
I---
MIIO#
BUSY#
I--
READY# BPRO#
r--
SYSB
BREQ#
I--
LOCK#
AEN#
I-
BPRN#
82288
'---
SOH
MRDC#
-I---'"'
-.........-
Sl#
MWDC#
~r--
MIIO#
10RC#
~r--
READY#
10WC#
r+--
CENL
INTA#
I-~
MB
ALE
CMDLY
DT/R#
l
AEN#
DEN
C
80286
OMPATIBLE
BUS
TO
ADDRESS LATCH
TO DATA TRANSCEIVER
TO
DATA TRANSCEIVER
,Figure 8-12. 82288 and 82289 Connections
8.6.5 82380 Integrated System Peripheral
231732i8-12
The 82380
is
designed for easy interface to the Intel386
DX
microprocessor.
It
consists
of a set of signals to interface directly to the Intel386
DX
microprocessor local bus.
Figure
8-13
depicts a typical system configuration with the Intel386
DX
microprocessor.
When the
82380 switches from slave to master mode (or vice versa), there are idle states
in which the
ADS#
signal
is
left floating. In order not to confuse the internal state
machine of the
82380, a
10
K ohm pull-up resistor should be used on the
ADS#
signal to
ensure that this line
is
inactive during these idle states.
As described in Section 8.3.3, the data transceivers should
be
disabled during any read
access to the
82380 in the slave mode to prevent bus contention.
8.6.6 82586
LAN
Coprocessor
The 82586
is
an intelligent, high-performance communications controller designed to
perform most tasks required for controlling access to a local area network (LAN).
In
most applications, the 82586
is
the communication manager for a station connected to a
8-21