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MULTIBUS I AND Intel386
DX
MICROPROCESSOR
82289
82289
RESET
RESET
ALWA'fS/ClIQ[CK
":'
MODE 1
MODE 2
82289
82289
RESET
RESET RESET
RESET
'Q
PARALLEL
D
~
I/D
OR
MODE 3
ADDRESSABLE
LATCH
ENABLE .
MUL
TIBUS
. BCLK
*
WHEN
LOW,
82289
IN MODE
3;
WHEN
HIGH,
82289
IN MODE 2
231732i9-8
Figure 9-8. Operating Mode Configurations
subsystems waiting to use MULTIBUS I. Therefore, the most efficient operating mode
depends on how often a subsystem accesses
MUL TIBUS I and how this frequency com-
pares to that of the other subsystems.
• Mode 1
is
adequate for a subsystem that needs MULTIBUS I access only occasion-
ally.
By
releasing MULTIBUS I after each bus cycle, the subsystem minimizes its
impact on other subsystems that use
MUL TIBUS I. .
• Mode 2
is
suited for a subsystem that
is
one of several subsystems that are all equally
likely
to
require MULTIBUS
I.
The performance decrease caused
by
the delay nec-
essary to take control of MULTIBUS I
is
distributed . evenly to all subsystems.
• Mode 3 should be used for a subsystem that uses MULTIBUS I frequently. The delay
required for taking control of
MULTIBUS I and
the
consequent performance
decrease
is
shifted to subsystems that use MULTIBUS I less often.
• Switching between modes 2 and 3
is
useful if the subsystem demand for
MUL TIBUS I
is
unknown or variable.
9-13