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DRAM
PLD
DESCRIPTIONS
80386
Interleaved
DRAM
Controller
pld-l
pipelined
lws
Equations
for
Module
DRAM_CONTROLLER_FOR_80386
Device
U34
-
Reduced
Equations:
!refin
:=
(!refin
&
!refreq
*
!qr
*
pclk
&
!rasO
&
!rasl
&
refin
*
pclk
&
refin
&
reset
*
!pclk
&
!refin);
!qr
(!pclk
&
!qr
&
!refin
*
!qr
&
!refin
&
refreq
&
!reset
*
pclk
&
qr
&
!rasO
&
!rasl
&
refin
&
!reset);
!
rasOp
(!pclk
& !
rasOp
*
pclk
& !
rasO)
;
!raslp
(!pclk
&
!raslp
*
pclk
&
!rasl);
!we
:=
(dramstart
&
!we
*
pclk
&
!we
*
!dramstart
&
!pclk
&
w_r);
!dramrdy
:=
(!dramrdy
&
!pclk
*
!ale
&
dramrdy
&
!muxoe
&
pclk);
leas
:=
!ale
:=
(!ale
&
dramrdy
&
!reset
*
!ale
&
!pclk
*
!ale
&
cas
*
cas
&
pclk
&
rasO
&
!rasl
&
!w_r
*
cas
&
pclk
&
!rasO
&
rasl
&
!w:..r) ;
(!ale
&
dramrdy
&
!reset
t
!ale
&
!pclk
t
!ale
&
cas
*
cas
&
pclk
&
rasO
&
!rasl
It
cas
&
pclk
&
!rasO
&
rasl);
. Figure B-3. DRAMP2
PLD
Equations (Contd.)
8-11