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CHAPTER
11
PHYSICAL DESIGN AND DEBUGGING
To maximize the performance of high-speed Intel386 DX processor systems, it
is
recom-
mended that optimum design guidelines be followed. This chapter outlines the basic
design issues, ranging from power and ground issues to achieving proper thermal envi-
ronment for Intel386
DX
microprocessor.
11.1
GENERAL DESIGN GUIDELINES
The performance and proper. operation of any high-speed system greatly depends upon
appropriate physical layout. This section gives an overview of design guidelines for layout
which are significant to both higher- and lower-frequency system design implementation.
The ever-increasing improvement
of
integrated circuit technology has led to an enor-'
mous increase in performance. The Inte1386 DX microprocessor, with an operating fre-
quency of
33
MHz (CLK2=66 MHz) and a
corre~ponding
fast edge rate, presents a
challenge to the conventional interconnection technologies. This challenge applies espe-
cially to system designers who are responsible for providing suitable, high frequency
interconnections at the systems level.
At higher frequencies, the interconnections in a circuit behave like· transmission lines
which degrade the system's overall speed and distort its output waveforms.
In laying out a conventional printed circuit board, there
is
freedom in defining the
length, shape and sequence of interconnections. However with high-speed devices such
as
the Inte1386 DX processor, this task should be carried out with careful planning,
evaluation, and testing of the wiring patterns.
It
is
critical to understand the physical
properties of transmission lines.
.
1.1.2 POWER DISSIPATION AND DISTRIBUTION
The Inte1386 DX microprocessor uses fast one-micro CHMOS IV process. The main
difference between the previous
HMOS microprocessors and the new
one~
is
that power
dissipation
is
primarily capacitive and that there is almost no
DC
power dissipation. As
power dissipation
is
directly proportional to frequency, accommodating high-speed
sig-
nals on printed circuit boards and through the interconnections
is
very critical. The
power dissipation of the VLSI device in operation
is
expressed
by
the sum of the power
dissipation
of
the circuit elements, which include internal logic gates, I/O buffers and
cache RAMs.
It
is
also a function of the operating conditions.
11-1