Intel SA-1100 Computer Hardware User Manual


 
1-4 SA-1100
Developer’s Manual
Introduction
1.2 Overview
The SA-1100 Microprocessor (SA-1100) is a general-purpose, 32-bit RISC microprocessor with a
16 Kbyte instruction cache, an 8 Kbyte write-back data cache, a minicache, a write buffer, a read
buffer, and a memory management unit (MMU) combined in a single chip. The SA-1100 is
software compatible with the ARM
V4 architecture processor family and can be used with ARM
support chips such as I/O, memory, and video. The core of the SA-1100 is derived from the core of
the SA-110 Microprocessor (SA-110), with the following changes:
Reduction in size of the data cache from 16 Kbyte to 8 Kbyte
Addition of a 512-byte mini data cache that allocates data based on MMU settings
Addition of debug support in the form of address and data breakpoints
Addition of a four-entry read buffer to facilitate software-controlled data prefetching
Addition of vector address adjust capability
Addition of a process ID register
The logic outside the core and caches is grouped into the following three modules:
Memory and PCMCIA control module (MPCM)
Memory interface supporting ROM, Flash, DRAM, SRAM and PCMCIA control signals
System control module (SCM)
Twenty-eight general-purpose interruptible I/O ports
Real-time clock, watchdog, and interval timers
Power management controller
Interrupt controller
Reset controller
Two on-chip oscillators for connection to 3.686 MHz and 32.768 kHz crystals
Peripheral control module (PCM)
Six-channel DMA controller
Gray/color, active/passive LCD controller
230 Kbps SDLC controller
16550-compatible UART
IrDA serial port (115 Kbps, 4 Mbps)
Synchronous serial port (UCB1100, UCB1200, SPI, TI, µWire)
Universal serial bus (USB) device controller