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8-4 SA-1100
Developer’s Manual
Clocks
If the PXTAL or TXTAL pin is driven above the voltage indicated, there will be no permanent
damage to the processor for pin voltages less than 2.5 V. However, ESD diodes on these pins will
attempt to clamp the voltage at approximately 1.5 V. The clamping action results in significant
noise injected into an internally generated supply used by several sensitive circuits on the
processor. Consequently, driving this pin higher than the 1 V limit can result in unpredictable
operation not obviously connected with the crystal pins. Users should refrain from driving the
crystal pins higher than 1 V even if there is no obvious side effect.
Note: In every system, there must be a provision for both a 3.6864-MHz and a 32.768-kHz source either
from an external oscillator or a crystal.
8.4 Clocking During Test
If TCK_BYP is high, then the PLLs and oscillators are not used and the high-speed core clock is
supplied externally on the TESTCLK pin. This mode is for testing only and is not supported for
standard operation.