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AMC Sites: AMC Signals
10007175-02 KAT4000 User’s Manual
8-3
Bn_TTIPn/RTIPn+/-: Input (receive) and output (transmit) signals to Zone 3.
CLK1+/-: CLOCK 1 Connects to the AMC synchronization clock transceivers.
CLK2+/-: CLOCK 2 Connects to the AMC synchronization clock transceivers.
EXPn_B_RX4/TX4+/-: Optional test loop to B3 port 8 (B1), B4 (B2), B1 (B3) and B2 (B4), respectively. PCI Express
interface port output (transmit) or input (receive) signals differential pairs.
EXPn_B_RX5/TX5+/-: Optional test loop to B3 port 9 (B1), B4 (B2), B1 (B3) and B2 (B4), respectively.
EXPn_B_RX6/TX6+/-: Optional test loop to B3 port 10 (B1), B4 (B2), B1 (B3) and B2 (B4), respectively.
EXPn_B_RX7/TX7+/-: Optional test loop to B3 port 11 (B1), B4 (B2), B1 (B3) and B2 (B4), respectively.
GIGn_RX/TX+/-: Gigabit Ethernet differential pairs to Ethernet core switch ports 0, 12, 18 and 11, respec-
tively.
PCIE_REFCLKn+/-: CLOCK 3 Connects to the PCI Express clock.
Bn_SCL: SERIAL I
2
C CLOCK To IPMC I
2
C buffer.
Bn_SDA: SERIAL I
2
C DATA/ADDRESS To IPMC I
2
C buffer.
TCK: TEST CLOCK INPUT (JTAG) clocks state information and test data into and out of the device
during operation of the TAP.
TDI: TEST DATA INPUT (JTAG) serially shifts test data and test instructions into the device during
TAP operations.
TDO: TEST DATA OUTPUT (JTAG) serially shifts test data and test instructions out of the device
during TAP operations.
TMS: TEST MODE SELECT (JTAG) controls the state of the TAP controller (input signal) in the
device.
TRST*: TEST RESET (JTAG) is the asynchronous reset for the JTAG controller (input signal).