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Overview: Components and Features
KAT4000 User’s Manual 10007175-02
1-2
The NOR Flash consists of two 16 megabyte banks. The supported NAND flash is 512 mega-
bytes or 1 gigabyte. Flash is only implemented on the processor KAT4000 board configura-
tion. Chapter 6 provides more information.
CPLD: The KAT4000 uses a Complex Programmable Logic Device (CPLD) to control board reset
logic, the Board Configuration, Board Revision and User LED registers, and miscellaneous
board logic. Register access to the PLD is only available on the processor KAT4000 board
configuration. Chapter 7 provides more information.
Ethernet: Depending on the configuration, the KAT4000 Ethernet interface consists of: Reduced
Gigabit (RGMII)/Serial Gigabit (SGMII)/1000Base-BX Serializer-Deserializer (SerDes) Ether-
net core or fat pipe switch module (Vitesse VSC7376), and 1000Base-BX (SerDes) devices
to the AMC sites.
One 10/100 eTSEC port from the MPC8548 is available through Zone 3 for Rear Transition
Module (RTM) access. This port is for development purposes only.
Serial I/O: An EIA-232 console serial port from the MPC8548 (serial 1) is available through an on-board
header and is optionally routable to Zone 3 for Rear Transition Module (RTM) access. The
default serial port settings are: 9,600 baud, 8 data, no parity, and 1 stop bit. This port is for
development purposes only.
A second serial port (serial 2) allows the MPC8548 to communicate with the Intelligent Plat-
form Management Controller (IPMC). The default serial port settings are: 115,200 baud, 8
data, no parity, and 1 stop bit.
I
2
C Bus: The private IPMC I
2
C bus consists of the following devices: temp sensors, the -48V con-
verter, AMC A-to-D converters, and an optional connection to Zone 3 for Rear Transition
Module (RTM) access.
One processor I
2
C bus links to the following: two user SEEPROMs, the CPU init SEEPROM,
the Real-Time Clock (RTC), the SO-DIMM, and the fat pipe switch module, if used. Another
processor I
2
C bus provides an optional connection to Zone 3 for Rear Transition Module
(RTM) access.
JTAG Hubs: The IPMC controls the two Joint Test Action Group (JTAG) interfaces (hubs). One JTAG hub
is connected to seven ports: the KSL PLD, the IPMC PLD, the fat pipe switch module, and the
four AMC sites. The other hub is connected to five ports: the VSC7376 switch, the PEX8524
switch, the clock synchronizers, the IPMC GPIO, and GbE PHYs. See “JTAG Interfaces” on
page 2-9 for more information.
AMC Sites: The KAT4000 has four single-width, mid-size Advanced Mezzanine Card (AMC) sites which
allow for use of up to four compatible AMC modules. Double-width and compact modules
can also be accommodated. B+ style AMC connectors are used. The KAT4000 complies