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Epson Research and Development
Page 141
Vancouver Design Center
Hardware Functional Specification S1D13505
Issue Date: 01/02/02 X23A-A-001-14
14.2 Frame Rate Calculation
The frame rate is calculated using the following formula:
Where:
VDP = Vertical Display Period = REG[09h] bits [1:0], REG[08h] bits [7:0] + 1
VNDP = Vertical Non-Display Period = REG[0Ah] bits [5:0] + 1
= in table below
HDP = Horizontal Display Period = ((REG[04h] bits [6:0]) + 1) * 8Ts
HNDP = Horizontal Non-Display Period = ((REG[05h] bits [4:0]) + 1) * 8Ts
= given in table below
Ts = Pixel Clock = PCLK
Table 14-3: Example Frame Rates with Ink Disabled
DRAM Type
1
(Speed Grade)
Display Resolution
Color Depth
(bpp)
Maximum
Pixel
Clock
(MHz)
Minimum
Panel
HNDP(T
s
)
Maximum Frame
Rate (Hz)
Panel
4
CRT
50ns
EDO-DRAM
MClk = 40MHz
N
RC
= 4
N
RP
= 1.5
N
RCD
= 2
• Single Panel.
• CRT.
• Dual Monochrome/Color Panel
with Half Frame Buffer Disabled.
5
• Simultaneous CRT + Single Panel.
• Simultaneous CRT + Dual
Monochrome/Color Panel with Half
Frame Buffer Disabled.
5
800x600
2
1/2/4/8
40
32 80 60
15/16
6
56 78 60
640x480
1/2/4/8 32 123 85
15/16 56 119 85
640x240
1/2/4/8 32 247 -
15/16 56 242 -
480x320
1/2/4/8 32 243 -
15/16 56 232 -
320x240
1/2/4/8 32 471 -
15/16 56 441 -
• Dual Color with Half Frame Buffer
Enabled.
• Dual Mono with Half Frame Buffer
Enabled.
800x600
2,3
1/2/4/8 20 32 80 -
15/16
6
13.3 32 53 -
640x480
1/2/4/8 20 32 123 -
15/16 13.3 32 82 -
FrameRate
PCLK
max
HDP HNDP+
()
VDP VNDP+
()×
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