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Epson Research and Development
Vancouver Design Center
S1D13505 S5U13505B00C Rev. 1.0 ISA Bus Evaluation Board User Manual
X23A-G-004-05 Issue Date: 01/02/05
Figure 3: S1D13505B00C Schematic Diagram (3 of 4)
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A
A
B
B
C
C
D
D
1.0
Epson Research & Development, Inc.
S5U13505B00C ISA Bus Evaluation Board
B
34Tuesday, March 24, 1998
Size Document Number Rev
Date: Sheet
of
D7
D6
D5
D4
D3
D2
D1
D0
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
D8
D9
D10
D11
D12
D13
D14
D15
D[0..15]
LA23
LA22
LA17
LA21
LA20
LA19
LA18
A[0..19]
LA[17..23]
+12V
VCC
VCC
VCC
VCC
VCC
VCC
+12V
VCC VCC
VCC VCC VCC
J2
AT CON-A
/IOCHCK
1
SD7
2
SD6
3
SD5
4
SD4
5
SD3
6
SD2
7
SD1
8
SD0
9
IOCHRDY
10
AEN
11
SA19
12
SA18
13
SA17
14
SA16
15
SA15
16
SA14
17
SA13
18
SA12
19
SA11
20
SA10
21
SA9
22
SA8
23
SA7
24
SA6
25
SA5
26
SA4
27
SA3
28
SA2
29
SA1
30
SA0
31
J3
AT CON-B
GND
1
RESET
2
+5V
3
IRQ9
4
-5V
5
DRQ2
6
-12V
7
OWS
8
+12V
9
GND
10
/SMEMW
11
/SMEMR
12
/IOW
13
/IOR
14
/DACK3
15
DRQ3
16
/DACK1
17
DRQ1
18
/REFRESH
19
CLK
20
IRQ7
21
IRQ6
22
IRQ5
23
IRQ4
24
IRQ3
25
/DACK2
26
T/C
27
BALE
28
+5V
29
OSC
30
GND
31
J5
AT CON-D
/MEMCS16
1
/IOCS16
2
IRQ10
3
IRQ11
4
IRQ12
5
IRQ15
6
IRQ14
7
/DACK0
8
DRQ0
9
/DACK5
10
DRQ5
11
/DACK6
12
DRQ6
13
/DACK7
14
DRQ7
15
+5V
16
MASTER
17
GND
18
R30
10K
R33
10K
R32
10K
R31
10K
J4
AT CON-C
/SBHE
1
LA23
2
LA22
3
LA21
4
LA20
5
LA19
6
LA18
7
LA17
8
/MEMR
9
/MEMW
10
SD8
11
SD9
12
SD10
13
SD11
14
SD12
15
SD13
16
SD14
17
SD15
18
R34
10K
R35
10K
+
C21
4.7uF 16V
+
C24
4.7uF 16V
+
C22
4.7uF 16V
+
C23
4.7uF 16V
RFSH#
BALE
RESET
MCS16#
WE1#
D[0..15]
A[0..19]
LA[17..23]
WAIT#
BUSCLK
RD#
WE0#