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Epson Research and Development
Vancouver Design Center
S1D13505 13505CFG Configuration Program
X23A-B-001-04 Issue Date: 01/03/29
HRTC/FPLINE (pixels) These settings allow fine tuning the TFT line pulse
parameters and are only available when the selected
panel type is TFT. Refer to S1D13505 Hardware
Functional Specification, document number X23A-A-
001-xx for a complete description of the FPLINE pulse
settings.
Start pos Specifies the delay (in pixels) from the start of the
horizontal non-display period to the leading edge of the
FPLINE pulse.
Pulse Width Specifies the pulse width (in pixels) of the FPLINE
output signal.
VRTC/FPFRAME (lines) These settings allow fine tuning the TFT frame pulse
parameters and are only available when the selected
panel type is TFT. Refer to S1D13505 Hardware
Functional Specification, document number X23A-A-
001-xx, for a complete description of the FPFRAME
pulse settings.
Start pos Specify the delay (in lines) from the start of the vertical
non-display period to the leading edge of the
FPFRAME pulse.
Pulse width Specifies the pulse width (in lines) of the FPFRAME
output signal.
Predefined Panels 13505CFG uses a file (panels.def) which lists various
panel manufacturers recommended settings. If the file
panels.def is present in the same directory as
13505cfg.exe, the settings for a number of predefined
panels are available in the drop-down list. If a panel is
selected from the list, 13505CFG loads the predefined
settings contained in the file.