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6-30 Intel® PXA255 Processor Developer’s Manual
Memory Controller
Figure 6-7. SDRAM_read_samebank_diffrow
Figure 6-8. SDRAM_read_samebank_samerow
CLCLtRCDtRP tRCD
tRAS
tRPCLCLtRCD
tRAS
tRCD
row col
0123
0000
tRP = 2 clks
tRAS = 7 clks
tRCD = 2 clks
CL = 2 clks
bank row
4567
col
0000
0ns 50ns 100ns 150ns
SDCLK
nSDCS
MA[24:0]
nSDRAS
nSDCAS
nWE
DATA
DQM[3:0]
CLCLCLCLtRCDtRCDtRPtRP
bank row col
0123
0000
tRP = 2 clks
tRAS = 5 clks
tRCD = 2 clks
CL = 2 clks
col
4567
0ns 50ns 100ns
SDCLK
nSDCS
MA[24:0]
nSDRAS
nSDCAS
nWE
DATA
DQM[3:0]