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13-6 Intel® PXA255 Processor Developer’s Manual
AC’97 Controller Unit
13.4.1.1 Slot 0: Tag Phase
In slot 0, the first bit is a global bit (SDATA_OUT slot 0, bit 15) that flags the validity for the entire
audio frame. If the valid frame bit is a 1, the current audio frame contains at least one slot time of
valid data. The next 12 bit positions sampled by AC’97 indicate which of the corresponding 12
time slots contain valid data. Bits 0 and 1 of slot 0 are used as CODEC ID bits for I/O reads and
writes to the CODEC registers as described in the next section. This way, data streams of differing
sample rates can be transmitted across AC-link at its fixed 48 kHz audio frame rate. The CODEC
can control the output sample rate of the ACUNIT using the SLOTREQ bits as described later (in
the Input frame description).
13.4.1.2 Slot 1: Command Address Port
Slot 1 is the Command Address Port. Slot 1 (in conjunction with the Command Data Port of Slot 2)
controls features and monitors status for AC’97 functions including, but not limited to, mixer
settings and power management (refer to AC’97 Specification revision 2.0 for more details).
The control-interface architecture supports up to sixty-four16-bit read/write registers, addressable
on even byte boundaries. Only accesses to even registers (0x00, 0x02, etc.) are valid. Accesses to
odd registers (0x01, 0x03, etc.) are not valid.
Audio output frame slot 1 communicates control register address and write/read command
information to the ACUNIT.
Two CODECs are connected to the single SDATA_OUT. To address the primary and secondary
CODECs individually, follow these steps:
To access the primary CODEC:
1. Set the Valid Frame bit (slot 0, bit 15)
2. Set the valid bits for slots 1 and 2 (slot 0, bits 14 and 13)
3. Write 0b00 to the CODEC ID field (slot 0, bits 1 and 0)
4. Specify the read/write direction of the access (slot 1, bit 19).
5. Specify the index to the CODEC register (slot 1, bits 18-12)
6. If the access is a write, write the data to the command data port (slot 2, bits 19-4)
To access the secondary CODEC:
1. Set the Valid Frame bit (slot 0, bit 15)
2. Clear the valid bits for slots 1 and 2 (slot 0, bits 14 and 13)
3. Write a non-zero value (0b01, 0b10, 0b11) to the CODEC ID field (slot 0, bits 1 and 0)
4. Specify the read/write direction of the access (slot 1, bit 19).
5. Specify the index to the CODEC register (slot 1, bits 18-12)
6. If the access is a write, write the data to the command data port (slot 2, bits 19-4).