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6-60 Intel® PXA255 Processor Developer’s Manual
Memory Controller
Table 6-26. Card Interface Command Assertion Code Table
MCMEMx_ASST
MCATTx_ASST
MCIOx_ASST
x_ASST_WAIT
x_ASST_HOLD
x_ASST_WAIT +
x_ASST_HOLD
(nPIOW asserted) (nPIOR asserted) (nPIOW asserted) (nPIOR asserted)
Programmed
Bit Value
Code
decimal
value
# MEMCLKs
(minimum)
to wait before
checking for
nPWAIT=’1’
# MEMCLKs
(minimum)
to assert
command
(nPIOW) after
nPWAIT=’1’
# MEMCLKs
(minimum)
to assert
command
(nPIOR) after
nPWAIT=’1’
# MEMCLKs
(minimum)
command
assertion time
# MEMCLKs
(minimum)
command
assertion time
(Code) (Code) (Code + 2) (2*Code + 3) (2*Code + 4) (3*Code + 5) (3*Code + 6)
00000 0 2 3 4 5 6
00001 1 3 5 6 8 9
00010 2 4 7 8 11 12
00011 3 5 9 10 14 15
00100 4 6 11 12 17 18
00101 5 7 13 14 20 21
00110 6 8 15 16 23 24
00111 7 9 17 18 26 27
01000 8 10 19 20 29 30
01001 9 11 21 22 32 33
01010 10 12 23 24 35 36
01011 11 13 25 26 38 39
01100 12 14 27 28 41 42
01101 13 15 29 30 44 45
01110 14 16 31 32 47 48
01111 15 17 33 34 50 51
10000 16 18 35 36 53 54
10001 17 19 37 38 56 57
10010 18 20 39 40 59 60
10011 19 21 41 42 62 63
10100 20 22 43 44 65 66
10101 21 23 45 46 68 69
10110 22 24 47 48 71 72
10111 23 25 49 50 74 75
11000 24 26 51 52 77 78
11001 25 27 53 54 80 81
11010 26 28 55 56 83 84
11011 27 29 57 58 86 87
11100 28 30 59 60 89 90