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1-4 Intel® PXA255 Processor Developer’s Manual
Introduction
1.2.10 Synchronous Serial Protocol Controller (SSPC)
The SSP Port provides a full-duplex synchronous serial interface that operates at bit rates from
7.2 kHz to 1.84 MHz. It supports National Semiconductor’s Microwire*, Texas Instruments’
Synchronous Serial Protocol*, and Motorola’s Serial Peripheral Interface*. The SSPC has FIFOs
with DMA access to memory.
1.2.11 Inter-Integrated Circuit (I
2
C) Bus Interface Unit
The I
2
C Bus Interface Unit provides a general purpose 2-pin serial communication port.The
interface uses one pin for data and address and a second pin for clocking.
1.2.12 GPIO
Each GPIO pin can be individually programmed as an output or an input. Inputs can cause
interrupts on rising or falling edges. Primary GPIO pins are not shared with peripherals while
secondary GPIO pins have alternate functions which can be mapped to the peripherals.
1.2.13 UARTs
The processor provides three Universal Asynchronous Receiver/Transmitters. Each UART can be
used as a slow infrared (SIR) transmitter/receiver based on the Infrared Data Association Serial
Infrared (SIR) Physical Layer Link Specification.
1.2.13.1 Full Function UART (FFUART)
The FFUART baud rate is programmable up to 230 Kbps. The FFUART provides a complete set of
modem control pins: nCTS, nRTS, nDSR, nDTR, nRI, and nDCD. It has FIFOs with DMA access
to or from memory.
1.2.13.2 Bluetooth UART (BTUART)
The BTUART baud rate is programmable up to 921 Kbps. The BTUART provides a partial set of
modem control pins: nCTS and nRTS. Other modem control pins can be implemented via GPIOs.
The BTUART has FIFOs with DMA access to or from memory.
1.2.13.3 Standard UART (STUART)
The STUART baud rate is programmable up to 230 Kbps. The STUART does not provide any
modem control pins. The modem control pins can be implemented via GPIOs. The STUART has
FIFOs with DMA access to or from memory.
The STUART’s transmit and receive pins are multiplexed with the Fast Infrared Communication
Port.