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Intel® PXA26x Processor Family Developer’s Manual 7-9
Liquid Crystal Display Controller
7.3.4 Output FIFOs
The LCD controller has two output FIFOs to queue pixel data before it is sent to the pins. Each
output FIFO is 16 bytes, organized as 16 entries by 8-bits wide. Pixel values are accumulated in a
serial shifter and written to the FIFO buffers in 4-, 8-, or 16-bit quantities. Pins used are:
• Four pins for single-panel monochrome screens
• 8 pins for single- and dual-panel monochrome screens and single-panel color displays
• 16 pins for dual-panel color and active displays.
Each time a value is taken from the bottom of the FIFO, the entry is invalidated, and all data in the
FIFO moves down one position.
7.3.5 Liquid Crystal Display Controller Pin Usage
See also Table 7-1, “Pin Descriptions” on page 7-4.
The timing of the line (L_LCLK) and frame (L_FCLK) clocks is programmable to support both
passive display and active display modes. Programming options include:
• Wait state insertion at the beginning and end of each line and frame
• Pixel clock (L_PCLK)
• Line clock (L_LCLK)
• Frame clock (L_FCLK)
• Output enable signal polarity
• Frame clock pulse width.
See Section 7.5, “Functional Timing” for pin timing diagrams. When the LCD controller is
disabled, all of its pins can be used for GPIO. See Chapter 4, “System Integration Unit” for further
details.
7.3.5.1 Passive-Display Timing
In passive display mode (LCCR0[PAS]=0), L_PCLK toggles only when data is being written to the
panel. When an entire line of pixels has been sent to the display, L_LCLK is asserted. When an
entire frame of pixels has been sent to the display, L_FCLK is asserted.
If an output FIFO underrun occurs (i.e., the LCD controller runs out of data), L_PCLK stalls until
valid data is available. This results in a slower pixel clock, but data sent to the display is always
valid.
To prevent a DC charge from building within a passive display, its power and ground supplies must
be switched periodically. Many modern panels do this automatically. If not, the LCD controller can
toggle the AC bias pin (L_BIAS) to signal the display to switch polarity. The frequency of the
L_BIAS toggle is controlled by programming the number of line clock transitions between each
toggle (LCCR3[ACB]).