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Reset Operation
5-34
Peripherals:
The timer count is set to its maximum value (FFFFh), the timer divide-
down value is set to 0, and the timer starts counting down.
The synchronous serial port is reset:
The port emulation mode is set to immediate stop.
Error and status flags are reset.
Receive interrupts are set to occur when the receive buffer is not
empty.
Transmit interrupts are set to occur when the transmit buffer can
accept one or more words.
External clock and frame synchronization sources are selected.
Continuous mode is selected.
Digital loopback mode is disabled.
The receiver and transmitter are enabled.
The asynchronous serial port is reset:
The port emulation mode is set to immediate stop.
Error and status flags are reset.
Receive, transmit, and delta interrupts are disabled.
One stop bit is selected.
Auto-baud alignment is disabled.
The TX pin is forced high between transmissions.
I/O pins IO0, IO1, IO2, and IO3 are configured as inputs.
A baud rate of (CLKOUT1 rate)/16 is selected.
The port is disabled.
CLK register bit 0 is cleared to 0 so that the CLKOUT1 signal is avail-
able at the CLKOUT1 pin.
No other registers or status bits (such as the accumulator, DP, ARP, and the
auxiliary registers) are initialized. Table 5–6 and Table 5–7 list the reset values
for all the registers mapped to on-chip addresses.