Filter
Top Products
Index
Index-4
B
B instruction 7-39
BACC instruction 7-40
BANZ instruction 7-41
baud-rate
detection procedure 10-14
divisor register (BRD) 10-13
generator 10-4
BCND instruction 7-43
BI bit 10-10
BIO
pin 8-17 to 8-18
BIT instruction 7-45
bit-reversed indexed addressing 6-10, F-3
BITT instruction 7-47
BLDD instruction 7-49
block diagrams
’C2xx overall 2-2
ARAU and related logic 3-12
arithmetic logic section of CPU 3-8
asynchronous serial port 10-3
auxiliary registers (AR0–AR7) and ARAU 3-12
bus structure 2-4
CPU (selected sections) 3-2
input scaling section of CPU 3-3
multiplication section of CPU 3-5
program-address generation 5-2
synchronous serial port 9-3
timer 8-8
block move instructions
block move from data memory to data memory
(BLDD) 7-49
block move from program memory to data
memory (BLPD) 7-54
BLPD instruction 7-54
Boolean logic instructions
AND 7-34
CMPL (complement/NOT) 7-64
OR 7-129
XOR (exclusive OR) 7-193
BOOT
(boot load pin), definition 4-4
boot loader 4-14 to 4-22
boot source (EPROM)
choosing an EPROM 4-14
connecting the EPROM 4-15
programming the EPROM 4-16
diagram 4-14 to 4-22
enabling 4-17
execution 4-18
generating code for EPROM C-23 to C-24
program code 4-21
BR
(bus request pin)
definition 4-3
shown in figure 4-13, 4-15
branch instructions
branch conditionally (BCND) 7-43
branch if current auxiliary register not zero
(BANZ) 7-41
branch to location specified by accumulator
(BACC) 7-40
branch to NMI
interrupt vector location
(NMI) 7-124
branch to specified interrupt vector location
(INTR) 7-71
branch to TRAP interrupt vector location
(TRAP) 7-192
branch unconditionally (B) 7-39
call subroutine at location specified by accumula-
tor (CALA) 7-58
call subroutine conditionally (CC) 7-60
call subroutine unconditionally (CALL) 7-59
conditional, overview 5-11
return conditionally from subroutine
(RETC) 7-143
return unconditionally from subroutine
(RET) 7-142
unconditional, overview 5-8
BRD (baud-rate divisor register) 10-13
buffered signals, JTAG E-10
buffering E-10
burst mode
definition F-3
error conditions 9-29
reception 9-24
transmission
with external frame sync 9-18
with internal frame sync 9-16
bus devices E-4
bus protocol in emulator system E-4