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Timer
8-10
sor v are the TIM and PRD, respectively. Both are16-bit registers mapped to
I/O space.
The 4-bit TDDR (timer divide-down register) and the 4-bit PSC (prescaler
counter) are contained in the timer control register (TCR) described in subsec-
tion 8.4.2. The TIM (timer counter register) and the PRD (timer period register)
are 16-bit registers described in subsection 8.4.3. You can read the TCR, TIM,
and PRD to obtain the current status of the timer and its counters.
Note:
Read the TIM for the current value in the timer. Read the TCR for the PSC
value. Because it takes two instructions to read both the TIM and the TCR,
the PSC may decrement between the two reads, making comparison of the
reads inaccurate. Therefore, where precise timing measurements are nec-
essary, you may want to stop the timer before reading the two values. (Set
the TSS bit of the TCR to 1 to stop the time; clear TSS to 0 to restart the timer.)
8.4.2 Timer Control Register (TCR)
The TCR, a 16-bit register mapped to on-chip I/O space, contains the control
bits that:
Control the mode of the timer
Specify the current count in the prescaler counter
Reload the timer
Start and stop the timer
Define the divide-down value of the timer
For ’C2xx devices other than the ’C209, Figure 8–5 shows the bit layout of the
TCR. Descriptions of the bits follow the figure. For a description of the ’C209
TCR, see subsection 11.4.2 on page 11-15.