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Controlling and Resetting the Port
9-8
9.3 Controlling and Resetting the Port
The synchronous serial port control register (SSPCR) controls the operation
of the synchronous serial port. To configure the serial port, a total of two writes
to the SSPCR are necessary:
1) Write your choices to the configuration bits and place the port in reset by
writing zeros to SSPCR bits XRST and RRST.
2) Write your choices to the configuration bits and take the port out of reset
by writing ones to bits XRST and RRST.
Note:
Set the DLB bit of the SSPCR to zero to disable digital loopback mode, which
is not normally used in serial transfers. See subsection 9.7.1,
Test Bits
, for
a description of digital loopback mode.
Make sure you write your configuration choices to the SSPCR during both
writes.
Figure 9–3 shows the 16-bit memory-mapped SSPCR. Following the figure is
a description of each of the bits.
Figure 9–3. Synchronous Serial Port Control Register (SSPCR)
— I/O-Space Address FFF1h
15 14 13 12
11 10 9 8
FREE SOFT TCOMP RFNE FT1 FT0 FR1 FR0
R/W–0 R/W–0 R–0 R–0 R/W–0 R/W–0 R/W–0 R/W–0
7 6 5 4
3 2 1 0
OVF IN0 XRST RRST TXM MCM FSM DLB
R–0 R–0 R/W–1 R/W–1 R/W–0 R/W–0 R/W–0 R/W–0
Note: R=Read access; W=Write access; value following dash (–) is value after reset.
Bits 15–14 FREE, SOFT. These bits are special emulation bits that determine the state
of the serial port clock when a breakpoint is encountered in the high-level lan-
guage debugger. If the FREE bit is set to 1, then, upon a breakpoint, the clock
continues to run (that is, free runs) and data is shifted out. In this case, SOFT
is a
don’t care
. If FREE = 0, then SOFT takes effect. The effects of FREE and
SOFT are summarized in Table 9–2. At reset, immediate stop mode is se-
lected (FREE = 0 and SOFT = 0).