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For this information: Look here:
Addressing modes (for addressing data
memory)
Chapter 6,
Addressing Modes
Assembly language instructions Chapter 7,
Assembly Language
Instructions
Assembly language instructions of
TMS320C1x, ’C2x, ’C2xx, and ’C5x
compared
Appendix B,
TMS320C1x/C2x/C2xx/C5x
Instruction Set Comparison
Boot loader Chapter 4,
Memory and I/O Spaces
Clock generator Chapter 8,
On-Chip Peripherals
CPU Chapter 3,
Central Processing Unit
Custom ROM from TI Appendix D,
Submitting ROM Codes
to TI
Emulator Appendix E,
Design Considerations for
Using XDS510 Emulator
Features Chapter 1,
Introduction
Chapter 2,
Architectural Overview
Input/output ports Chapter 4,
Memory and I/O Spaces
Interrupts Chapter 5,
Program Control
Memory configuration Chapter 4,
Memory and I/O Spaces
Memory interfacing Chapter 4,
Memory and I/O Spaces
On-chip peripherals Chapter 8,
On-Chip Peripherals
Pipeline Chapter 5,
Program Control
Program control Chapter 5,
Program Control
Program examples Appendix C,
Program Examples
Program-memory address generation Chapter 5,
Program Control
Registers summarized Appendix A,
Register Summary
Serial ports Chapter 9,
Synchronous Serial Port
Chapter 10,
Asynchronous Serial Port
Stack Chapter 5,
Program Control
Status registers Chapter 5,
Program Control
Timer Chapter 8,
On-Chip Peripherals
TMS320C209 differences and
similarities
Chapter 11,
TMS320C209
Wait-state generator Chapter 8,
On-Chip Peripherals