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Scanning-Logic Circuitry
2-13
Architectural Overview
2.6 Scanning-Logic Circuitry
The ’C2xx has JTAG scanning-logic circuitry that is compatible with IEEE
Standard 1149.1. This circuitry is used for emulation and testing purposes
only. The serial scan path is used to test pin-to-pin continuity as well as to per-
form operational tests on the on-chip peripherals. The internal scanning logic
provides access to all of the on-chip resources. Thus, the serial-scan pins and
the emulation pins on ’C2xx devices allow on-board emulation. However, on
all ’C2xx devices, the serial scan path does not have boundary scan logic.
Appendix E provides information to help you meet the design requirements of
the Texas Instruments XDS510 emulator with respect to IEEE-1149.1 de-
signs and discusses the XDS510 cable.
Scanning-Logic Circuitry