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Instruction Set Comparison Table
B-9
TMS320C1x/C2x/C2xx/C5x Instruction Set Comparison
Syntax
Description5x2xx2x1x
B[
D
]
pma
[
,
{
ind
} [
, next ARP
]]
√
Branch Unconditionally With Optional Delay
Modify the current auxiliary register and ARP as speci-
fied and pass control to the designated program-
memory address. If you specify a delayed branch
(BD), the next two instruction words (two 1-word in-
structions or one 2-word instruction) are fetched and
executed before branching.
BACC
√ √
Branch to Address Specified by Accumulator
Branch to the location specified by the 16 LSBs of the
accumulator.
BACC[
D
]
√
Branch to Address Specified by Accumulator
With Optional Delay
Branch to the location specified by the 16 LSBs of the
accumulator.
If you specify a delayed branch (BACCD), the next two
instruction words (two 1-word instructions or one
2-word instruction) are fetched and executed before
branching.
BANZ
pma
BANZ
pma
[
,
{
ind
}
[
, next ARP
]]
√
√ √
Branch on Auxiliary Register Not Zero
If the contents of the 9 LSBs of the current auxiliary
register (TMS320C1x) or the contents of the entire cur-
rent auxiliary register (TMS320C2x) are
≠ 0, branch to
the specified program-memory address.
TMS320C2x and TMS320C2xx devices: Modify the
current AR and ARP (if specified) or decrement the
current AR (default). TMS320C1x devices: Decrement
the current AR.
BANZ[
D
]
pma
[
,
{
ind
}
[
, next
ARP
]]
√
Branch on Auxiliary Register Not Zero With
Optional Delay
If the contents of the current auxiliary register are
≠ 0,
branch to the specified program-memory address.
Modify the current AR and ARP as specified, or decre-
ment the current AR.
If you specify a delayed branch (BANZD), the next two
instruction words (two 1-word instructions or one
2-word instruction) are fetched and executed before
branching.