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F-20
RPTC: See
repeat counter (RPTC).
RRST:
Receive reset bit
. Bit 4 of the synchronous serial port control register
(SSPCR); resets the receiver portion of the synchronous serial port.
RS
:
Reset pin
. When driven low, causes a reset on any ’C2xx device, includ-
ing the ’C209.
RS:
Reset pin
. (On the ’C209 only) When driven high, causes a reset.
RSR:
Receive shift register.
Shifts data serially into the synchronous serial
port from the DR pin. See also
XSR
.
R/W
:
Read/write pin.
Indicates the direction of transfer between the ’C2xx
and external program, data, or I/O space.
RX pin:
Asynchronous receive pin
. During reception in the asynchronous
serial port, this pin accepts a character one bit at a time, transferring it
to the ARSR.
S
SARAM:
Single-access RAM
. RAM that can accessed (read from or written
to) once in a single CPU cycle.
scratch-pad RAM: Another name for DARAM block B2 in data space (32
words).
SDTR:
Synchronous data transmit and receive register.
An I/O-mapped
read/write register that sends data to the transmit FIFO buffer and ex-
tracts data from the receive FIFO buffer.
SETBRK: Bit 4 of the asynchronous serial port control register (ASPCR);
selects the output level (high or low) on the TX pin when the port is not
transmitting.
short-immediate value: An 8-, 9-, or 13-bit constant given as an operand
of an instruction that is using immediate addressing.
sign bit: The MSB of a value when it is seen by the CPU to indicate the sign
(negative or positive) of the value.
sign extend: Fill the unused high order bits of a register with copies of the
sign bit in that register.
sign-extension mode (SXM) bit:
Bit 10 of status register ST1; enables or
disables sign extension in the input shifter. It also differentiates between
logic and arithmetic shifts of the accumulator.
Glossary