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Set Control Bit
SETC
7-155
Assembly Language Instructions
Syntax SETC
control bit
Operands control bit: Select one of the following control bits:
C Carry bit of status register ST1
CNF RAM configuration control bit of status register ST1
INTM Interrupt mode bit of status register ST0
OVM Overflow mode bit of status register ST0
SXM Sign-extension mode bit of status register ST1
TC Test/control flag bit of status register ST1
XF XF pin status bit of status register ST1
SETC C
0123456789101112131415
1111001001111101
SETC CNF
0123456789101112131415
1010001001111101
SETC INTM
0123456789101112131415
1000001001111101
SETC OVM
0123456789101112131415
1100001001111101
SETC SXM
0123456789101112131415
1110001001111101
SETC TC
0123456789101112131415
1101001001111101
SETC XF
0123456789101112131415
1011001001111101
Execution Increment PC, then ...
1 → control bit
Status Bits None
Description The specified control bit is set to 1. Note that LST may also be used to load
ST0 and ST1. See Section 3.5,
Status and Control Registers
, on page 3-15
for more information on each control bit.
Opcode