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Add PREG to Accumulator
APAC
7-37
Assembly Language Instructions
Syntax APAC
Operands None
APAC
1514131211109876543210
1
011111000000100
Execution Increment PC, then ...
(ACC) + shifted (PREG) → ACC
Status Bits
Affected by Affects
PM and OVM C and OV
This instruction is not affected by SXM.
Description The contents of PREG are shifted as defined by the PM status bits of the ST1
register (see Table 7–7) and added to the contents of the accumulator. The re-
sult is placed in the accumulator. APAC is not affected by the SXM bit of the
status register. PREG is always sign extended. The task of the APAC instruc-
tion is also performed as a subtask of the LTA, LTD, MAC, MACD, MPYA, and
SQRA instructions.
Table 7–7. Product Shift Modes
PM Bits
Bit 1 Bit 0
Resulting Shift
0
0 No shift
0 1 Left shift of 1 bit
1 0 Left shift of 4 bits
1
1 Right shift of 6 bits
Words 1
Cycles for a Single APAC Instruction
ROM
DARAM SARAM External
1 1 1 1+p
Cycles for a Repeat (RPT) Execution of an APAC Instruction
ROM DARAM SARAM External
n n n n+p
Opcode
Cycles