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SUBS
Subtract From Accumulator With Sign Extension Suppressed
7-182
Syntax SUBS
dma
Direct addressing
SUBS
ind
[, AR
n
] Indirect addressing
Operands dma: 7 LSBs of the data-memory address
n: Value from 0 to 7 designating the next auxiliary register
ind: Select one of the following seven options:
* *+ *– *0+ *0– *BR0+ *BR0–
SUBS
dma
1514131211109876543210
0
11001100 dma
SUBS
ind
[, AR
n
]
1514131211109876543210
0
11001101 ARU N NAR
Note: ARU, N, and NAR are defined in Section 6.3,
Indirect Addressing Mode
(page 6-9).
Execution Increment PC, then ...
(ACC) – (data-memory address) → ACC
Status Bits
Affected by Affects
OVM OV and C
This instruction is not affected by SXM.
Description The content of the specified data-memory location is subtracted from the accu-
mulator with sign extension suppressed. The data is treated as a 16-bit un-
signed number, regardless of SXM. The accumulator behaves as a signed
number. SUBS produces the same results as a SUB instruction with SXM =
0 and a shift count of 0.
The carry bit is cleared (C = 0) if the result of the subtraction generates a bor-
row and is set (C = 1) if it does not generate a borrow.
Words 1
Cycles for a Single SUBS Instruction
Program
Operand ROM DARAM SARAM External
DARAM 1 1 1 1+p
SARAM 1 1 1, 2
†
1+p
External 1+d 1+d 1+d 2+d+p
†
If the operand and the code are in the same SARAM block
Opcode
Cycles