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Instruction Set Summary
7-10
Table 7–5. Control Instructions (Continued)
Mnemonic OpcodeCyclesWordsDescription
POPD Pop top of stack to data memory, direct or indirect 1 1 1000 1010 IAAA AAAA
PSHD Push data memory value on stack, direct or
indirect
1 1 0111 0110 IAAA AAAA
PUSH Push low ACC onto stack 1 1 1011 1110 0011 1100
RPT
Repeat next instruction, direct or indirect 1 1 0000 1011 IAAA AAAA
Repeat next instruction, short immediate 1 1 1011 1011 IIII IIII
SETC Set C bit 1 1 1011 1110 0100 1111
Set CNF bit 1 1 1011 1110 0100 0101
Set INTM bit 1 1 1011 1110 0100 0001
Set OVM bit 1 1 1011 1110 0100 0011
Set SXM bit 1 1 1011 1110 0100 0111
Set TC bit 1 1 1011 1110 0100 1011
Set XF bit 1 1 1011 1110 0100 1101
SPM Set product shift mode 1 1 1011 1111 0000 00PM
SST Store status register ST0, direct or indirect 1 1 1000 1110 IAAA AAAA
Store status register ST1, direct or indirect 1 1 1000 1111 IAAA AAAA
Table 7–6. I/O and Memory Instructions
Mnemonic Description Words Cycles Opcode
BLDD
Block move from data memory to data memory,
direct/indirect with long immediate source
2 3 1010 1000 IAAA AAAA
+ 1 word
Block move from data memory to data memory,
direct/indirect with long immediate destination
2 3 1010 1001 IAAA AAAA
+ 1 word
BLPD Block move from program memory to data memory,
direct/indirect with long immediate source
2 3 1010 0101 IAAA AAAA
+ 1 word
DMOV Data move in data memory, direct or indirect 1 1 0111 0111 IAAA AAAA
IN Input data from I/O location, direct or indirect 2 2 1010 1111 IAAA AAAA
+ 1 word
OUT Output data to port, direct or indirect 2 3 0000 1100 IAAA AAAA
+ 1 word
SPLK
Store long immediate to data memory location,
direct or indirect
2 2 1010 1110 IAAA AAAA
+ 1 word