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Memory and I/O Spaces
2-8
CPU reads data on the third cycle and writes data on the fourth cycle. However,
DARAM allows the CPU to write and read in one cycle; the CPU writes to
DARAM on the master phase of the cycle and reads from DARAM on the slave
phase. For example, suppose two instructions, A and B, store the accumulator
value to DARAM and load the accumulator with a new value from DARAM.
Instruction A stores the accumulator value during the master phase of the CPU
cycle, and instruction B loads the new value to the accumulator during the
slave phase. Because part of the dual-access operation is a write, it only ap-
plies to RAM.
2.3.2 Single-Access On-Chip Program/Data RAM
Some of the ’C2xx devices have 4K 16-bit words of single-access RAM
(SARAM). The addresses associated with the SARAM can be used for both
data memory and program memory and are software- or hardware-configur-
able (depending on the device) to either external memory or the internal
SARAM. When configured as external, these addresses can be used for off-
chip data and program memory. Code can be booted from off-chip ROM and
then executed at full speed once it is loaded into the on-chip SARAM. Because
the SARAM can be mapped to program and/or data memory, the SARAM al-
lows for more flexible address mapping than the DARAM block.
SARAM is accessed only once per CPU cycle. When the CPU requests multi-
ple accesses, the SARAM schedules the accesses by providing a not-ready
condition to the CPU and then executing the accesses one per cycle. For ex-
ample, if the instruction sequence involves storing the accumulator value and
then loading a value to the accumulator, it would take two cycles to complete
in SARAM, compared to one cycle in DARAM.
2.3.3 Factory-Masked On-Chip ROM
Some of the ’C2xx devices feature an on-chip, 4K 16-bit words of program-
mable ROM. The ROM can be selected during reset by driving the MP/MC
pin
low. If the ROM is not selected, the device starts its execution from off-chip
memory.
If you want a custom ROM, you can provide the code or data to be pro-
grammed into the ROM in object file format, and Texas Instruments will gener-
ate the appropriate process mask to program the ROM. See Appendix D for
details on how to submit ROM code to Texas Instruments.