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Hardware Description
ARM DUI 0224F Copyright © 2003-2007 ARM Limited. All rights reserved. 3-61
3.8 CLCDC interface
A PrimeCell CLCD controller is present in the ARM926EJ-S PXP Development Chip.
The PB926EJ-S provides a display interface with outputs to:
• a VGA connector for connecting a VGA or SVGA monitor
• a CLCD adaptor board with CLCD, keypad, and touchscreen connectors. (See
Appendix C CLCD Display and Adaptor Board for information on the
touchscreen controller and the CLCD displays.)
• an optional RealView Logic Tile. (The tile can be used to create a custom
interface to a non-standard CLCD display or to process the display data.)
A PLD rearranges the CLCDC display signals for the selected resolution and color
depth for a CLCD display. A DAC converts the rearranged CLCD signals into VGA
analog signals. The LCDMODE[1:0] signals select the mapping of CLCD video data
to the RGB signals for different resolutions.
Use the Synchronous Serial Port (SSP) to access the touchscreen controller on the
adapter board.
Figure 3-26 on page 3-62 shows the architecture of the display interface.