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Hardware Description
3-90 Copyright © 2003-2007 ARM Limited. All rights reserved. ARM DUI 0224F
Figure 3-40 Simplified interface for UART[3:1]
See also UART on page 4-97 and the ARM PrimeCell UART (PL011) Technical
Reference Manual.
The signals associated with the UART interface are shown in Table 3-23.
Table 3-23 Serial interface signal assignment
Signal Description
nDRVINEN0 This signal can be driven HIGH by an attached logic tile. This
tristates the signals from serial connectors J10A and J10B (SER0
and SER1) and allows the RealView Logic Tile to drive these
signals. The signal is normally pulled LOW by a resistor to ground.
nDRVINEN1 This signal can be driven HIGH by an attached logic tile. This
tristates the signals from serial connector J11A (SER2) and allows
the RealView Logic Tile to drive these signals. The signal is
normally pulled LOW by a resistor to ground.
SERx_TXD Transmit data
SERx_RTS Ready to send
SERx_DTR
a
Data terminal ready
SERx_CTS Clear to send
SERx_DSR
a
Data set ready