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Hardware Description
ARM DUI 0224F Copyright © 2003-2007 ARM Limited. All rights reserved. 3-65
3.9 DMA
On-chip peripherals in the ARM926EJ-S PXP Development Chip use DMA channels
6–15.
DMA control signals for channels 0–5 are passed to the RealView Logic Tile connectors
and signals for channels 0–2 are also passed to the DMA mapping multiplexors in the
FPGA. Figure 3-27 on page 3-66 shows the DMA architecture.
See also Direct Memory Access Controller and mapping registers on page 4-52.
Caution
The FPGA and RealView Logic Tile share the signals for channels 0 to 2. Ensure that
the RealView Logic Tile logic does not drive the DMA signals at the same time as the
FPGA is driving the signals. You can, for example, put a tristate control in your
RealView Logic Tile peripherals such that the RealView Logic Tile peripheral DMA
signals can be disabled if a FPGA peripheral is using a shared DMA channel.
The DMA control signals have pull-up or pull-down resistors as appropriate. It is not
necessary therefore to drive unused signals.