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3-94 Copyright © 2003-2007 ARM Limited. All rights reserved. ARM DUI 0224F
3.22 Test, configuration, and debug interfaces
The following test and configuration interfaces are located on the PB926EJ-S:
• JTAG, see JTAG and USB debug port support on page 3-96
• Logic analyzer, see ChipScope integrated logic analyzer on page 3-104
• Trace, see Embedded trace support on page 3-104
• ARM926EJ-S PXP Development Chip AHB bus monitor, see AHB monitor on
page 3-16
• Configuration switches and status indicators, see Configuration control on
page 3-7 and User switches and LEDs on page 3-87.
• Boot Monitor, see Using the PB926EJ-S Boot Monitor and platform library on
page 2-14.
Note
There are also test points and debug connectors for individual interface circuits. See Test
and debug connections on page A-33.
Figure 3-42 on page 3-95 shows the test and debug connectors, links, and LEDs.