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ARM DUI 0224F Copyright © 2003-2007 ARM Limited. All rights reserved. 4-97
4.25 UART
The PrimeCell UART is an AMBA compliant SoC peripheral that is developed, tested,
and licensed by ARM Limited. There are three UARTs in the ARM926EJ-S PXP
Development Chip and one UART is in FPGA. The 24MHz reference clock to the
UARTs come from the crystal oscillator that is part of OSC0.
The following key parameters are programmable:
• communication baud rate, integer, and fractional parts
• number of data and stop bits
• parity mode
• FIFO enable and FIFO trigger levels
• UART or IrDA protocol
• hardware flow control.
Table 4-74 UART implementation
Property Value
Location ARM926EJ-S PXP Development Chip for UART 0-2 FPGA
for UART3
Memory base address
0x101F1000
for UART0
0x101F2000
for UART1
0x101F3000
for
UART2
0x10009000
for UART3
Interrupt 12 on primary controller for UART0 13 on primary controller
for UART1 14 on primary controller for UART2 6 on secondary
controller for UART3
DMA 15 UART0 Tx 14 UART0 Rx 13 UART1 Tx 12 UART1 Rx 11
UART2 Tx 10 UART2 Rx
DMA channels for UART3 Tx and Rx are selectable as 0,1, or
2. See Direct Memory Access Controller and mapping registers
on page 4-52.
Release version ARM UART PL011 r1p3
Reference documentation ARM PrimeCell UART (PL011) Technical Reference Manual
(see also UART interface on page 3-88)