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Programmer’s Reference
ARM DUI 0224F Copyright © 2003-2007 ARM Limited. All rights reserved. 4-77
PCI_SELFID register
Writing the slot location of the PB926EJ-S into this register enables normal
configuration accesses to return information on the PB926EJ-S. That is, normal
configuration accesses to this slot position are converted automatically into self
configuration accesses.
The register format is shown in Figure 4-27 and Table 4-52.
Figure 4-27 PCI_SELFID register
PCI_FLAGS register
This read-only register returns status information about abort conditions on the PCI bus.
The register format is shown in Figure 4-28 on page 4-78 and Table 4-53 on page 4-78.
Table 4-51 PCI_IMAPx register format
Bits Description
[31:4] Reserved. Use read-modify-write to preserve value.
[3:0] Contains the value to use for bits [31:28] of the PCI address for accesses to this
region.
Table 4-52 PCI_SELFID register format
Bits Description
[31:5] Reserved. Use read-modify-write to preserve value.
[4:0] Contains the slot location of the PB926EJ-S on the PCI backplane.