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Programmer’s Reference
4-64 Copyright © 2003-2007 ARM Limited. All rights reserved. ARM DUI 0224F
Note
Although the primary interrupt controller is a vectored interrupt controller (VIC), the
examples in this section do not used vectored addresses.
To determine an interrupt source, read the STATUS registers in the PIC and SIC to
determine the interrupt controller that generated the interrupt.
The sequence to determine and clear an interrupt is:
1. Determine the interrupt source by reading PIC_IRQStatus and SIC_STATUS.
The interrupt handler must read PIC_IRQStatus first to determine if the interrupt
was generated by a source that is connected directly to the PIC. If PIC_IRQStatus
indicates that the interrupt source was the SIC, the SIC_STATUS register must be
read identify the interrupting device.
2. Determine the nature of the interrupt by reading the peripheral masked interrupt
status register.
3. Clear the peripheral interrupt by setting the appropriate bit in the peripheral
interrupt clear register.
Each peripheral contains its own interrupt mask and clear registers that must be
configured before an interrupt is enabled. The code segments in Example 4-1 to
Example 4-3 on page 4-65 show how primary and secondary peripheral interrupts are
handled. See the selftest program supplied on the CD for more examples of interrupt
handling.
Example 4-1 shows an example of clearing and re-enabling the primary controller SCI0
card out interrupt.
Example 4-1 Clearing and re-enabling SCI0 card out interrupt
#define PIC_BASE 0x10140000
#define PIC_IntEnable ((volatile unsigned int *)(PIC_BASE + 0x10))
#define PIC_IntEnClear ((volatile unsigned int *)(PIC_BASE + 0x14))
#define PIC_SCI0 (1 << 15) // Smart Card interrupt
#define SCI1_CARDOUTIM 0x002 // Card removed
#define SCI1_IMSC ((volatile int *)(SCI1_BASE + 0x6C))
#define SCI1_ICR ((volatile int *)(SCI1_BASE + 0x78))
*PIC_IntEnClear = PIC_SCI0; // Mask the PIC SCI0 interrupt
*SCI0_ICR = SCI0_CARDOUTIM; // Clear SCI0 card out flag
// ...
// code for managing SCI I/0