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ARM DUI 0224F Copyright © 2003-2007 ARM Limited. All rights reserved. 4-51
Table 4-31 PL110 hardware playback mode
Dev. chip signal
TFT24bit 8/8/8
memory bit, color
TFT16bit 1/5/5/5
memory bit, color
TFT16bit 5/6/5 red
LSB memory bit,
color
TFT16bit 5/6/5 blue
LSB memory bit,
color
CLD23 23, B7 - - -
CLD22 22, B6 - - -
CLD21 21, B5 - - -
CLD20 20, B4 - - -
CLD19 19, B3 - - -
CLD18 18, B2 - - -
CLD17 17, B1 14/30, B5 14/30, B3 14/30, R3
CLD16 16, B0 13/29, B4 13/29, B2 13/29, R2
CLD15 15, G7 12/28, B3 12/28, B1 12/28, R1
CLD14 14, G6 11/27, B2 11/27, B0 11/27, R0
CLD13 13, G5 10/26, B1 10/26, G5 10/26, G5
CLD12 12, G4 15/31, I (B0) 15/31, B4 15/31, R4
CLD11 11, G3 9/25, G5 9/25, G4 9/25, G4
CLD10 10, G2 8/24, G4 8/24, G3 8/24, G3
CLD9 9, G1 7/23, G3 7/23, G2 7/23, G2
CLD8 8, G0 6/22, G2 6/22, G1 6/22, G1
CLD7 7, R7 5/21, G1 5/21, G0 5/21, G0
CLD6 6, R6 15/31, I (G0) 15/31, B4 15/31, R4
CLD5 5, R5 4/20, R5 4/20, R4 4/20, B4
CLD4 4, R4 3/19, R4 3/19, R3 3/19, B3
CLD3 3, R3 2/18, R3 2/18, R2 2/18, B2
CLD2 2, R2 1/17. R2 1/17, R1 1/17, B1
CLD1 1, R1 0/16, R1 0/16, R0 0/16, B0
CLD0 0, R0 15/31, I (R0) 15/31, B4 15/31, R4