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Programmer’s Reference
4-90 Copyright © 2003-2007 ARM Limited. All rights reserved. ARM DUI 0224F
Note
Use the SYS_CLCD register to control the SSP chip selects. See CLCD Control
Register, SYS_CLCD on page 4-32.
• An offboard SSP device, such as an EEPROM, can be connected to expansion
header J29. If you connect both the LCD adaptor board and the off board SSP
device at the same time, ensure the correct SSP interface protocol is used when
communicating with each device.
• Synthesized SSP peripherals in a RealView Logic Tile FPGA can be connected
using the RealView Logic Tile expansion connectors. Disable the buffer with the
RealView Logic Tile HDRY signal YL62 (nDRVINEN1) in order to avoid
conflicts with the LCD adaptor board and expansion header.